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Xilinx, Verplex Collaborate to Provide Formal Verification At Various Stages of FPGA Design Flow
SAN JOSE & MILPITAS, Calif.--(BUSINESS WIRE)--Aug. 27, 2001--
Xilinx, Inc. (NASDAQ:XLNX) and Verplex(TM)Systems, Inc., today
launched one of the first formal verification environments
specifically for the design of high-density field programmable gate
arrays (FPGAs).
The design environment includes the Verplex Conformal Equivalence
Checker and the Xilinx Integrated Software Environment (ISE) 4.1i.
In related news, Verplex announced that its Conformal Equivalence
Checker now supports Xilinx Virtex, Virtex II Platform FPGAs and
Spartan II device family.
``We believe simulation by itself is no longer adequate for
verifying complex FPGA designs,'' notes C. Michael Chang, president and
chief executive officer (CEO) of Verplex. ``The teaming of Xilinx and
Verplex tools enables complex FPGA designers to apply formal
verification techniques to reduce design cycle times in order to meet
their demanding time to market challenges.''
``As FPGAs become more and more complex, designers are turning to
proven IC design solutions like formal verification,'' adds Rich
Sevcik, vice president and general manager of Xilinx. ``These designers
will find that formal verification tools like Verplex's Conformal
Logic Equivalence Checker can be used successfully throughout the
design flow to functionally verify designs at every checkpoint.''
The FPGA Verification Flow
Formal verification has become an important piece of an FPGA
design environment as design density increases. Equivalence checking,
part of a formal verification methodology, automatically detects
functional inconsistencies, providing a reliable way to ensure that
the final design implementation does what the register transfer level
(RTL) code specifies.
Together with Xilinx ISE, Conformal Equivalence Checker can
provide equivalence checking at the RTL and gate level of the design
flow to functionally verify designs at every checkpoint.
Conformal Equivalence Checker and Xilinx ISE provide fast runtimes
and high capacity to handle large FPGA designs. Users can adopt the
formal verification methodology at any design stage from the RTL
design level to the final transistor level design. Both have
easy-to-use interfaces that enable designers to use them with minimal
training.
Pricing and Availability
Software in the FPGA formal verification design flow support
Hewlett Packard and Sun Microsystems operating systems. Tools are
priced at separately. Conformal Equivalence Checker is priced at
$105,000 U.S. pricing. New seats of ISE will be available in September
with pricing starting at $695. A free, downloadable WebPACK version
will be available later this quarter.
For more information, contact Tom Senna, vice president of
business development at Verplex, at (408) 586-0392 or via email
at tomsenna@verplex.com.
About Verplex
Verplex Systems Inc. is an EDA company focused on delivering
high-speed, high-capacity and easy-to-use formal verification products
for complex SOC design. Founded in 1997, it is privately held and
funded by leading venture capital firms. Corporate headquarters is
located at 300 Montague Expressway, Suite 100, Milpitas, Calif. 95035.
Telephone: (408) 586-0300. Facsimile: (408) 586-0230. Email:
info@verplex.com. Online information is found at its web site:
http://www.verplex.com.
About Xilinx
Xilinx is the leading innovator of complete programmable logic
solutions, including advanced integrated circuits, software design
tools, predefined system functions delivered as cores, and
unparalleled field engineering support. Founded in 1984 and
headquartered in San Jose, Calif., Xilinx invented the field
programmable gate array (FPGA) and fulfills more than half of the
world demand for these devices today. Xilinx solutions enable
customers to reduce significantly the time required to develop
products for the computer, peripheral, telecommunications, networking,
industrial control, instrumentation, high-reliability/military, and
consumer markets. For more information, visit the Xilinx web site at
www.xilinx.com/ise.
Verplex and BlackTie are trademarks of Verplex Systems Inc. All
other companies and products referenced herein are trademarks or
registered trademarks of their respective holders.
Contact:
Xilinx, San Jose
Ann Duft, 408/879-4726
ann.duft@xilinx.com
or
Public Relations for Verplex, Milpitas
Nanette Collins, 617/437-1822
nanette@nvc.com
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